LG HT353SD-A2 Manual De Servicio página 49

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• DESCRIPCIÓN DE PINS
Pin Name
SDA/CDOUT
SCL/CCLK
AD0/CS
AD1/CDIN
VLC
RESET
AIN3A
AIN3B
AIN2A
AIN2B
AIN1A
AIN1B
AGND
VA
AFILTA
AFILTB
VQ
TSTO
FILT+
TSTO
AIN4A/MICIN1
AIN4B/MICIN2
AIN5A
AIN5B
MICBIAS
AIN6A
AIN6B
PGAOUTA
PGAOUTB
VA
AGND
NC
TSTO
VLS
TSTI
NC
SDOUT
SCLK
LRCK
MCLK
DGND
VD
INT
OVFL
Sólo para uso interno de LGE
#
Pin Description
Serial Control Data (Input/Output) - SDA is a data I/O in IC
1
the control port interface in SPI
2
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Addre ss Bit 0 (IC) / Co ntrol Port Chip Select (SPI) (Input) - AD0 is a chip address pin in IC Mode;
3
CS is the chip-select signal for SPI format.
Addre ss Bit 1 (IC) / Ser ial Control Data Input (SPI) (Input) - AD1 is a chip address pin in IC Mode;
4
CDIN is the input data line for the control port interface in SPI Mode.
Control Port Power (Input) - Determines the required signal level for the control port interface. Refer
5
to the Recommended Operating Conditions for appropriate voltages.
6
Reset (Input) - The device enters a low-power mode when this pin is driven low.
7
Stereo Analog Input 3 (Input) - The full-scale level is specified in the ADC Analog Characteristics
8
specification table.
9
Stereo Analog Input 2 (Input) - The full-scale level is specified in the ADC Analog Characteristics
10
specification table.
11
Stereo Analog Input 1 (Input) - The full-scale level is specified in the ADC Analog Characteristics
12
specification table.
13
Analog Ground (Input) - Ground reference for the internal analog section.
14
Analog Power (Input) - Positive power for the internal analog section.
15
Antialias Filter Connection (Output) - Antialias filter connection for the channel A ADC input.
16
Antialias Filter Connection (Output) - Antialias filter connection for the channel B ADC input.
17
Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
18
Test Pin (Output) - This pin must be left unconnected.
19
Positiv e Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
20
Test Pin - This pin must be left unconnected.
21
Stereo Analog Input 4 / Microphone Input 1 & 2 (Input) - The full-scale level is specified in the ADC
22
Analog Characteristics specification table.
23
Stereo Analog Input 5 (Input) - The full-scale level is specified in the ADC Analog Characteristics
24
specification table.
Microphone Bias Supply (Output) - Low-noise bias supply for external microphone. Electrical charac-
25
teristics are specified in the DC Electrical Characteristics specification table.
26
Stereo Analog Input 6 (Input) - The full-scale level is specified in the ADC Analog Characteristics
27
specification table.
28
PGA Analog Audio Output (Output) - Either an analog output from the PGA block or high impedance.
29
30
Analog Power (Input) - Positive power for the internal analog section.
31
Analog Ground (Input) - Ground reference for the internal analog section.
32
33
No Connect - These pins are not connected internally and should be tied to ground to minimize any
34
potential coupling effects.
35
Test Pin (Output) - This pin must be left unconnected.
Serial Audio Interface Power (Input) - Determines the required signal level for the serial audio inter-
36
face. Refer to the Recommended Operating Conditions for appropriate voltages.
37
Test Pin (Input) - This pin must be connected to ground.
38,
No Connect - These pins are not connected internally and should be tied to ground to minimize any
39,
potential coupling effects.
40
41
Serial Audio Data Output (Output) - Output for two's complement serial audio data.
42
Serial Clock (Input/Output) - Serial clock for the serial audio interface.
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
43
serial audio data line.
44
Master Clock (Input/Output) - Clock source for the ADC's delta-sigma modulators.
45
Digital Ground (Input) - Ground reference for the internal digital section.
46
Digital Power (Input) - Positive power for the internal digital section.
47
Interrupt (Output) - Indicates an interrupt condition has occurred.
48
Overflow (Output) - Indicates an ADC overflow condition is present.
®
Mode. CDOUT is the output data line for
TM
Mode.
2-40
Copyright © 2008 LG Electronics. Inc.Todos los derechos reservados.
Sólo con fines de capacitación y mantenimiento

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