Diagrama De Bloque Dcf - LG FLATRON MC-991A Manual De Uso

SECCI Ó N DCF
SECCI Ó N DCF

DIAGRAMA DE BLOQUE DCF

RD16
RD27
LD02
RD30
RD5
LPF
CD11
CVBS CVBS
RD55
QD6
IN IN
RD31
QD2
SYS SYS
control
control
PAL NTSC
Caracter í sticas
Caracter í sticas
• SEPARACIÓN Y/C adaptable dentro
del campo
• Intensificador vertical.
• Corrección de apertura horizontal.
• Convertidor A/D de 8 bits (canal 1)
• Convertidor D/A de 8 bits (canal 2)
• 4 X PLL
• Fijación de sincronización
• Cuatro líneas de retardo de 1H
Departamento T cnico
é
36 34
DVss DVdd TRAP
CXD2064Q
ADIN
CD6
NTSC : 1H
2
A/D
PAL : 2H
QD3
Clamp
1
CLPO
PNR
RD8
Logical operation
NTPL2
NTPL1
23
25
VCO
26
CPO VCV
42 44
RD1
CD2
RD13
CD62
RD2
LPF (Filtro Paso Bajo)
fc = 1/2¥ ð ( LC)
1/2 , C = CD44+(CD40//CD5) = 16.43pF
L = 22uH
fc = 1/2¥ ð ( 16.43pF X 22uH)
LD1 LD2
31 30 29 27 22 21 20
APCN DVss DVdd VEH1 VEH2 VEH3
Vertical
Enhancement circuit
NTSC : 1H
PAL : 2H
DL £« £«
Adaptive
filter
operatio
n
1/4 Phase
Comparator
SW
1/2
(LC) (LC )
PLSC FIN
39 37
CD7
RD25
QD8
RD34
RD15
CD21
RD12
1/2 = 8.4[MHz]
47
5V
RD22
19 17
MOD1 MOD2
18
DVss
RD17
DAVS
10
RD6
LD8
AYO
RD11
D/A
9 QD1
CD43
CD38
DAVD
8
ACO
D/A
7
RD19
RD9
LD3
QD4
SW
CD44
CD40
RD21
CKSC
38
R528
RD4
C571
5V R529
C572
38
FSC FSC
Q530
IN IN
CD31
R529
R530
C275
(From u-COM)
SYSTEM fsc
PAL/SECAM 4.43MHz
NTSC3.58 3.58MHz
NTSC4.43 4.43MHz
LG Electronics España, S.A.
MC-991A
RD18
Y Y
QD5
OUT OUT
RD33
CD39
RD20
C C
QD7
OUT
OUT
RD32
CD5
IC501
TDA8376A
SECAM REF.
& X-tal OSC out
SCL SDA
3 4
IIC Control
: masa analógica
: masa digital