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Chapter 5 Specifications
Gate Time
Trigger Characteristics
Trigger Input
Level
Slope
pulse Width
Latency
Trigger Output
Level
pulse Width
Maximum Frequency
Two-channel Characteristics - Phase Offset
Range
Waveform Phase
Resolution
Clock Reference
External Reference Input
Lock Range
Level
Lock Time
Impedance (typical)
Internal Reference Output
Frequency
Level
Impedance (typical)
Sync Output
Level
Impedance
DG1000Z User's Guide
Trigger Sensitivity
Range
GateTime1
GateTime2
GateTime3
GateTime4
GateTime5
GateTime6
TTL-compatible
Rising or falling (optional)
>100ns
Sweep: <100ns (typical)
Ráfaga: <300ns (typical)
TTL-compatible
>60ns (typical)
1MHz
0° to 360°
0.03°
10MHz±50Hz
250mVpp to 5Vpp
<2s
1kΩ, AC coupling
10MHz±50Hz
3.3Vpp
50Ω, AC coupling
TTL-compatible
50Ω, nominal value
0% (about 140mV hysteresis
voltage) to 100% (about 2mV
hysteresis voltage)
1.310ms
10.48ms
166.7ms
1.342s
10.73s
>10s
RIGOL
5-6
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