JVC UX-H33 Manual De Servicio página 33

4.10 LC72136N (IC2) : PLL frequency synthesizer
• Pin layout
XT 1
FM/AM 2
CE 3
DI 4
CLOCK 5
DO 6
FM/ST/VCO 7
AM/FM 8
9
10
SDIN 11
• Block diagram
• Pin function
Pin
Symbol I/O
No.
1 XT I X'tal oscillator connect (75kHz)
2 FM/AM O LOW:FM mode
3 CE I When data output/input for 4pin (input)
and 6pin (output): H
4 DI I Input for receive the serial data from
controller
5 CLOCK I Sync signal input use
6 DO O Data output for Controller Output port
7 FM/ST/VCO O Low: MW mode
8 AM/FM O Open state after the power on reset
9 LW I/O Input/output port
10 MW I/O Input/output port
11 SDIN I/O Data input/output
12 IFIN I IF counter signal input
XT
22
GND
21
LPFOUT
20
LPFIN
19
PD
18
VCC
17
FMIN
16
AMIN
15
14
IFCONT
13
IFIN
12
1
22
16
1/2
15
3
4
C B
2
Data Shift Register & Latch
I/F
5
6
Power
on
17
Reset
21
7
Function
Phase
Reference
Detector
Driver
Charge Pump
Swallow Counter Swallow Counter
1/16,1/17 4bit 1/16,1/17 4bit
Unlock
Detector
12bit
Programmable
DriverS
8 2 11 13
Pin
Symbol
No.
13 IFCONT
14
15 AMIN
16 FMIN
17 VCC
18 PD
19 LPFIN
20 LPFOUT
21 GND
22 XT
18
19
20
12
Universal
Counter
I/O Function
O IF signal output
- Not use
I AM Local OSC signal output
I FM Local OSC signal input
- Power suplly (VDD=4.5-5.5V)
When power ON:Reset circuit move
O PLL charge pump output (H: Local
OSC frequency Height than Reference
frequency. L: Low Agreement: Height
impedance)
I Input for active lowpassfilter of PLL
O Output for active lowpassfilter of PLL
- Connected to GND
I X'tal oscillator (75KHz)
UX-H33
(No.22044)1-33