Siemens 6ES7136-6BA00-0CA0 Informacion De Producto página 26

Supplement to the Attachment "Reaction times" of the Manuals
"Power Module F-PM-E 24VDC/8A PPM ST (6ES7136-6PA00-0BC0)"
and "Digital Input Module F-DI 8x24VDC HF (6ES7136-6BA00-
0CA0)"
Digital output of the Power Module F-PM-E 24VDC/8A PPM ST
Definition of response time for fail-safe digital outputs
The response time represents the interval between an incoming safety message frame from the backplane bus and the signal
change at the digital output.
Following applies to activation of the dark test:
Maximum response time with no faults
The maximum response time for fail-safe digital outputs in the error-free case is equal to:
Max. response time = 2 × T
Maximum response time in case of error with detection by readback (change of user data)
Max. response time = 3 × T
Maximum response time in case of error with detection by bit pattern test
Max. response time = Configured test period
The following applies to deactivation of the dark test:
Maximum response time with no faults
The maximum response time for fail-safe digital outputs in the error-free case is equal to:
Max. response time = 2 × T
Maximum response time in case of error with detection by readback (change of user data)
Max. response time = 3 × T
A channel fault may not be detected until process value change 1 to 0 takes place at the output DQ/P1 and P2.
Digital inputs of Power Module F-PM-E 24VDC/8A PPM ST and fail-safe module F-DI 8x24VDC HF
Definition of the response time for fail-safe digital inputs
The response time represents the interval between a signal change at the digital input and reliable availability of the safety
frame on the backplane bus.
Maximum response time with external short-circuits
F-PM-E 24VDC/8A PPM ST:
Max. response time = T1 + T
F-DI 8x24VDC HF:
Max. response time = T1 + T
26
+ Maximum(dark test time, switch-on time)
cycle
+ Maximum(dark test time, switch-on time)
cycle
+ Maximum(dark test time, switch-on time)
cycle
+ Maximum(dark test time, switch-on time)
cycle
+ (n * T ) + Sum[x=0...1](Tsx) + MAX(T
cycle cycle
+ (n * T ) + Sum[x=0...7](Tsx) + MAX(T
cycle cycle
, T2)
cycle
, T2)
cycle
Product Information for the Documentation of ET 200SP Fail-safe Modules
A5E32586870-AK, 02/2024