Tabla de contenido
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MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 2/11-27")
D1 1
D1 2
D1 3
D1 4
3
BAV99
3
BAV99
3
BAV99
3
BAV99
J3
1
1
9
9
17
17
2
2
10
10
18
18
3
3
11
11
19
19
TP11
TP12
TP13
TP14
TP15
TP16
4
TP17
TP18
TP19
TP20
TP21
4
12
12
20
20
5
5
13
13
21
21
6
6
14
14
HO T_ PLUG
22
22
7
7
15
15
23
23
8
8
16
16
24
24
C1
25
C3
27
C5
29
C5_
30
C2
26
C4
28
+5VS
D2 1
D2 2
3
3
3
BAV99
3
BAV99
D1 9
D2 0
BAV99
BAV99
+3 V_DD VI
+5V _ED ID
R3 5
3.3K
2
3
3
2
DV I_SCL_3V
Q1
Q2
R3 9
BS N20
BS N20
3.3K
2
3
3
2
DV I_SDA_3V
Q3
Q4
BS N20
BSN20
+3 V_DD VI
V33
L5
42 OH M
C2 5
C2 6
C2 7
C2 8
0.1U K
0.1U K
0.1U K
0.1U K
C3 5
C3 6
C3 7
C3 8
0.1U K
0.1U K
0.1U K
0.1U K
LCD03B
First issue 04 / 04
+5VS
D1 5
D1 6
3
BAV99
3
BAV99
TP138
D2 -
D1 -
D0 -
P2
D2 +
D1 +
D0 +
+5VS
D1 7
+5 V_ED ID
1
2
D1 8
1N4148
L4
1
2
42 OH M
1N4148
C2 2
ID CK +
+
C2 1
P2
22 U
0.1U K
16V
IDCK -
P2
R2 6
L32 220 OH M
TP231
1K
J4
TP233
3
3
4
4
L33 220 OH M
1
2
1
2
TP232
R31
2210 018551
1K
DVI AUDIO input
+5V _ED ID
U4
R4 0
R4 1
8
1
C2 4
VC C
A0
2K
2K
7
2
0.1U K
WP
A1
DV I_SC L
6
3
SC L
A2
5
4
DV I_SD A
SD A
GN D
AT24C02A
+3 V_DD VI
C1 5
C1 6
(O PEN)
(O PEN)
22P J
22P J
(O PEN)
L3
30 OH M
R2 1
GF BK
P3
R2 2
33
DV I_CK
P3
R2 3
0
GP EN
P3
R2 4
0
GVS
P3
R2 5
0
GH SSO G
P3
C1 7
C1 8
C1 9
C2 0
22P J
22P J
22P J
22P J
(O PEN)
(O PEN)
(O PEN)
(O PEN)
U3
51
QO2
52
QO3
53
QO4
54
QO5
55
A UD_DV I_L
QO6
56
QO7
57
OVCC
Z D 1
58
OGND
R2 7
TZ MC 5V1
59
QO8
10K
60
QO9
61
QO10
Z D 2
62
QO11
63
TZ MC 5V1
QO12
64
QO13
65
QO14
66
QO15
67
VCC
68
GND
69
QO16
70
QO17
71
QO18
72
QO19
73
AU D_ DV I_R
QO20
74
QO21
Z D 3
75
QO22
R3 3
TZ MC 5V1
10K
Z D 4
SII169
TZ MC 5V1
+3 V_D DVI
D2 +
D2 -
D1 +
D1 -
D0 +
P2
D0 -
ID CK +
IDCK -
VCC
U5
3
2
VIN
VOUT
LD 1117-3. 3
C3 4
0.1U K
V C C
U6
3
VI N
VOUT
C3 9
0.1U K
LD 1117-3. 3
(O PEN)
R1 7
0
R1 8
10K
(O PEN)
R1 9
0
R2 0
10K
(o pen)
CN 1
0
22P
R N 1
47
5
4
6
3
7
2
8
1
5
4
6
3
7
2
8
1
R N 2
47
25
QE13
24
RN 4
47
QE12
23
5
QE11
22
6
QE10
21
7
QE9
20
8
QE8
19
OGND
18
RN 5
47
OVCC
17
5
QE7
16
6
QE6
15
7
QE5
14
8
QE4
13
5
QE3
12
6
QE2
11
7
QE1
10
8
QE0
9
PDOZ
RN 6
47
8
SCDT
7
R2 8
STAG_OUT
6
VCC
5
GND
4
R2 9
1.5K
PIXS
3
SDA
2
R3 0
PDZ
1
RESETZ
+3V_ADVI
+3V_PDVI
R3 7
+3 V_DD VI
R3 6
10K
39 0
+3 V_DD VI
(O PEN)
+3V_ADVI
R4 2
0
R4 3
0
(O PEN)
MAIN BOARD
+3V_ADVI
C3 0
C3 1
C3 2
C3 3
+
C2 9
0.1U K
0.1U K
0.1U K
0.1U K
47U
16V
+3V_PDVI
2
C4 1
+
C4 0
47U
0.1U K
16V
(o pen)
C N 2
22P
GR E[ 0..7]
P3
GR E7
GR E6
GR E5
GR E4
GR E3
GR E2
GR E1
GR E0
(o pen)
C N 3
GG E[ 0..7]
P3
22P
R N 3
47
GGE 7
5
4
GGE 6
6
3
GGE 5
7
2
GGE 4
8
1
(o pen)
CN 4
22P
4
GGE 3
P3
3
GGE 2
2
GGE 1
GB E[ 0..7]
1
GGE 0
4
GBE 7
3
GBE 6
GBE 5
2
GBE 4
1
GBE 3
4
GBE 2
3
GBE 1
2
GBE 0
1
P7
DV I_PD O
P7
DV I_SC DT
1.5K
(o pen)
+3 V_D DVI
(o pen)
1.5K
C23
3300P K
R3 2
0
(O PEN)
R3 4
10K
+3 V_DD VI
D2 3
2
1
S II169_ RS TZ
P7
1N4148
DV I_SDA_3V
P2
R3 8
0
(O PEN)
DV I_SCL_3V
P2
Publicidad
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