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MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAINBOARD INTERFAZ MAIN BOARD
( MAIN BOARD 4/11-27",30")
R1 64
470K
C2 16 470P
50 V K
R5 4
0
(o pen)
CO MP _CRPR_ JUMPDW N
C2 17 0.01U
50 V K
R5 5
0
2
1
CO MP _CRPR
MUXCR
C 218
10 U M 20V
+5VS
R1 35 0
(o pen)
C2 19 0.01U
CO MP _YCYP_JUMPDWN
50 V K
R 138
0
2
1
CO MP _YCY P
MU XY
C 220
10 U M 20V
U32
R1 40 0
(o pen)
C2 21 0.01U
CO MP _CBPB_JUM PD WN
50 V K
1
RIN_1
R 141
0
2
1
2
CO MP _CBP B
HDdetect
MUXCB
C 222
10 U M 20V
3
GIN_1
4
GND
C2 23 0.01U
5
BIN_1
50 V K
6
GNDD
2
1
7
RE D_PR_I N
RIN_2
C 224
10 U M 20V
8
GNDD
9
GIN_2
C2 25 0.01U
10
GNDD
50 V K
11
BIN_2
2
1
12
GR EE N _YP_IN
VIN_1
C 226
10 U M 20V
C2 27 0.01U
BA7657F
50 V K
2
1
BLUE _PB_IN
C 228
10 U M 20V
TWO_OPTION SELECTS 2 FOR D-SUB PC AND YPBPR
PC_AV SELECTS D-SUB OR SOGIN(YPBPR )
TWO_OPTION SELECTS 1 FOR YPBPR FROM RCA JACK
TWO_OPTION SELECTS 2 FOR PC FROM D-SUB
PC_AV SELECTS D-SUB OR SOGIN(YPBPR )
TP234
1
TP235
2
CO MP _YCYP_JUMPDW
N
3
TP236
CO MP_CBPB_J UM PD WN
4
5
TP237
6
CO MP _CRPR_ JUMPDW N
AV DD
C7 6
C7 8
C7 9
C8 0
C8 1
C8 2
C8 3
C8 4
C8 5
C8 6
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
LCD03B
First issue 04 / 04
74LVC1G126
P7
1
PC_AV
2
RG B_ HS
P1
3
74LVC1G126
1
2
RGB_VS
(o pen)
P1
L12
10U K
3
L31
B EAD
C2 29
R 165
0.01U
P7
GCOAST
C 230
1U K
50 V K
24
HIN_1
23
68K
DIN_2
22
HD_O
21
R_out
20
VCC
19
G_out
18
CON_IN
17
CON_O
16
CTL
TW O_ OPTI ON
15
B_out
14
VD_out
13
VIN_2
P7
SCL_C PU
SDA_C PU
P7
J14
+5VS
L8
42 OH M
C7 4
0.1U K
VD 33
PV DD
C8 9
C9 0
C9 1
C9 2
C9 3
C9 4
C9 5
C9 6
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
(O PEN)
VD 33
P7
5
R4 4
0
R4 5
0
OE
VCC
GB LKSPL
U7
A
R4 7
4
47
GND
Y
R4 9
47
C43
PV DD
AV DD
5
OE
VCC
U8
GV MID
A
C4 7
4
GND
Y
0.1U K
41
GND
GND
42
VD
C5 3
0 .22U K
BA IN
43
BAIN
44
GND
45
VD
46
VD
U9
47
GND
C5 6
0 .22U K
GA IN
48
GAIN
49
SOGIN
C58
1000 P J
SO GI N
50
AD9883KST-110
GND D
VDD
50V
51
VD
GND
52
VD
53
I2C Addr: 0x98
GND
C6 1
0 .22U K
RA IN
54
RAIN
55
A0
R5 1
0
56
SCL
R5 2
0
57
SDA
GV RE F
58
REF BYPASS
59
VD
60
GND
GND
C6 4
0.1U K
A DCK
VD3 3
U11
C6 9
U12
74LV123PW
0.1U K
74LVC1G126
VD 33
P7
1
5
14
MV_EN
OE
VCC
CX1
1
15
1A
RCX1
2
2
A
1B
13
1Q
3
4
3
4
GND
Y
1R
1Q
9
5
2A
2Q
10
12
2B
2Q
11
6
2R
CX2
7
RCX2
U14
LD1117-3.3
AV DD
VCPU 33
VD 33
3
2
VI N
VOUT
L10
42 OH M
+
C7 5
47U
16V
+ C7 7
10U
16V
T race and
R4 6
C4 2
.039U
Components
3.3K
16 V K
Close IC
3900P
PVD D
50 V K
VD 33
(o pen)
(o pen)
20
RN7 47
19
ADBE0
GBE0
1
8
B0
18
ADBE1
GBE1
2
7
B1
17
ADBE2
GBE2
3
6
B2
16
ADBE3
GBE3
4
5
B3
15
ADBE4
GBE4
1
8
B4
14
ADBE5
2
7
GBE5
B5
13
ADBE6
3
6
GBE6
B6
12
ADBE7
4
5
GBE7
B7
11
RN8
47
10
AD GE 0
GGE 0
9
1
8
G0
AD GE 1
GGE 1
8
2
RN9
7
G1
AD GE 2
GGE 2
7
3
6
G2
6
AD GE 3
47
GGE 3
4
5
G3
5
AD GE 4
GGE 4
1
8
G4
4
AD GE 5
RN 10
GGE 5
2
7
G5
3
AD GE 6
GGE 6
3
6
G6
47
2
AD GE 7
GGE 7
4
5
G7
1
(o pen)
(o pen)
(o pen)
(o pen)
AD RE 0
1
GR E0
8
AD RE 1
2
RN 11
GR E1
7
AD RE 2
3
6
GR E2
AD RE 3
4
5
GR E3
AD RE 4
1
47
8
GR E4
AD RE 5
2
RN 12
7
GR E5
AD RE 6
3
6
GR E6
AD RE 7
GR E7
4
5
47
R 163
0
R5 8
0
L30 30 OH M
(o pen)
L7
30 OH M
(o pen)
C 210
C 211
C6 5
DV I_CK
22P J
22P J
22P J
(o pen)
(o pen)
(o pen)
A DHS
R5 9
4 7
AD VS
R6 0
4 7
C6 7
C6 8
22P
22P
OPEN
OPEN
R6 1
C7 0
U13
VD 33
220P
1K
50V J
74LVC1G126
R6 2
47K
D2 4
R6 3
36 0
P7
1
2
1
5
GAFE OE
OE
VCC
1N4148
2
A
D2 5
R6 4
1K
1
2
3
4
GND
Y
1N4148
+
C7 1
R6 6
C7 3
1U
47K
VD 33
220P
50V
50V J
R6 7 221K F
MAIN BOARD
U15
+5VS
L11
LD1117-3.3
42 OH M
PVDD
3
2
VIN
VOUT
C8 7
+
C8 8
47 U
0.1U K
16V
GB E[ 0..7]
P7
GG E[ 0..7]
P7
GR E[0 ..7]
P7
GCLK
C6 6
22P J
(o pen)
GFBK
P7
GVS
P7
VD 33
R6 5
47
P7
GH SSO G
C7 2
22P J
(o pen)
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