Balluff BIR 01- K15SL -000S15 Serie Manual De Instrucciones página 45

BIR 01- _ _ _ _ -K15SL _-000S15
Inductive Rapid Positioning System
7
SSI interface (continued)
7.3 Faulty SSI query
Underclocking
If there are too few clock edges, the current data level will
be maintained for the time t (t
o
after the last negative edge from Clk. If, however, another
positive edge occurs, the next bit will then be output.
Afterwards a T event will occur, the data output goes to
o
Low and after time t has elapsed to High. The high level is
m
maintained until the next clock burst. Time t
Overclocking
If there are too many clock edges, the data output will
switch to low after the correct number of cycles has been
completed. The t timer is reset for every additional
m
negative edge of Clk and internally the T
After time t the data again goes to high.
m
A T or T event is shown in the status field as a
o m
communication error. In summary a communication error
can have the following causes:
– The bit number set in the BIR does not correspond to
the bit number in the controller.
n > n  T event
BIR PLC o
n < n  T event
BIR PLC m
– The SSI clock frequency is too low
f < 9.771 kHz  T event
Clk o
– The pause between two clock packages is too short
event
 T
m
www.balluff.com
= 2 · T timeout times)
o Clk
following t .
m o
event is set.
m
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