Biss C Interface - Balluff BML Información Básica

Interfaces para el encóder magnético
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Interfaces for BML Magnetic Encoder System
2
Interfaces (continued)
2.3

BiSS C interface

The XML file can be obtained at
www.balluff.com or via email to
service@balluff.de.
RS422 differential signal
If the sensor is supplied with voltage that is
isolated from the processing electronics, the
GND for this voltage must be connected to the
GND of the processing electronics.
Suggested circuit for processing:
+Clk
–Clk
+Data
–Data
GND
U
Sensor
B
Fig. 2-5:
Wiring example for a sensor with controller
The wires for Clk, Data and Power must be in
twisted pairs (see Fig. 2-5).
Clock pulses may only be sent when there is power to the
measuring system.
For further information, see:
www.biss-interface.com.
The data output of the sensor must be loaded
with 120 Ω, otherwise incorrect measurements
may result.
With the BiSS C interface, both position data and register
data can be transmitted bi-directionally. The register data
is transmitted parallel to the position data and has no
effect on the system's measuring behavior. The Balluff
BiSS C sensor heads can be connected to the controller
via a point-to-point connection.
Transmission is CRC-secured, i.e. the controller can check
if the data was received correctly. If the transmission has
failed, the data can be discarded and requested again.
www.balluff.com
Transmission (as shown in Fig. 2-6) offers the following
possibilities:
An error and a warning bit are also transmitted.
Secure bi-directional data transmission is always
available (register communication).
Runtime compensation of the clock and data line is
possible. This makes it possible to use larger cable
lengths or higher data rates.
Fig. 2-6:
Clk
With the first rising edge (trigger time), the controller
Data
120Ω
signals that it is requesting a value from the sensor
head. The measurement value valid at this point is
included in the data transmission later on.
Controller
The sensor confirms the data request with the second
rising edge of the clock by setting low on the data line.
The time difference between the second rising edge of
the clock and the first low of the sensor data line
corresponds to the runtime of both signals. It appears
with all further frame edges and can thus be
compensated for in the controller. This makes it
possible to use much longer cables or higher data
rates than with SSI interfaces.
Example: Data with a clock rate of 1 MHz can be
transmitted for example up to 400 m. Only around
20 m would be possible without runtime
compensation.
All further bits that the sensor transfers are output in
the sensor at the next rising edge.
The sensor prepares the data during t
preparation is complete, the sensor sets the data signal
to high (start bit). Beginning with the CDS the sensor
then send one bit of data with each clock cycle. The
data bit is either the echo of the CDM bit which was
received in the last data set or one bit of the requested
register data.
Then the data from Bit1 to Bitn are sent.
An error bit and warning bit as well as the CRC follow.
Register communication:
A bit can be transmitted by the controller to the sensor
with each frame. To do this, the controller's clock signal
is either set to high or low during t
2 × t
(CDM) and mirrors it in the CDS bit in the next frame.
As a result, the controller can detect if the bit was
recognized correctly (secure transmission).
Signal sequence for the BiSS C interface
). The sensor recognizes it as a high or low bit
Clk
english
. When
busy
time (timeout =
m
9

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